Achieving Higher Performance in Multicore Packet Processing

A new class of processor is appearing in a variety of storage, security, wireless base stations and networking applications to replace the very expensive – with long lead times to boot – proprietary Application Specific Integrated Circuits (ASICs) developed by OEM system solution providers as well as those designed by industry giants, such as LSI Logic and IBM.

This class of multi-core processor is made up of eight, sixteen, even sixty-four individual processor cores with integrated memory controllers, various I/O interfaces, and separate acceleration engines.

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